Michał Żygowski

Firmware Engineer with networking background. Feels comfortable with low-level development using C/C++ and assembly. Interested in advanced hardware features, security and coreboot. Core developer of coreboot. Maintainer of Braswell SoC, PC Engines, Protectli and Libretrend platforms. Creating open source firmware solution in 3mdeb Embedded Systems Consulting for 3 years. Active speaker at various open source firmware related conferences: Open Source Firmware Conference 2018 and 2019, Xen Developer And Design Summit 2020 and others.

The speaker's profile picture

Country

Poland

Homepage

https://3mdeb.com

Employer

3mdeb Embedded Systems Consulting

Timezone during event

UTC+1


Sessions

12-02
21:45
30min
TrenchBoot DRTM features for AMD platforms
Michał Żygowski, Piotr Król

TrenchBoot is a young open source project aiming at security and integrity of
the boot process leveraging advanced silicon security features, like Intel
Trusted Execution Technology (TXT) and AMD Secure Startup. It integrates with
open source projects like GRUB2 and Linux to perform a measured launch of the
operating system software, also called Dynamic Root of Trust for Measurement.
The presentation will describe the progress of the project, what new features
has been added and what we managed to achieve so far.

In particular 3mdeb has been developing support for the AMD Secure Startup.
Since last year we managed to push the project even further thanks to the
founding from NLnet Foundation, NGI Zero PET grant. The most key changes
introduced into the project are the DRTM event log and the possibility to boot
Xen Hypervisor with measured launch. If you want to hear more what is on our
roadmap and what problems we are still trying to solve, this presentation is
for you.

Main Stage
12-02
14:00
30min
POWER9 support in coreboot
Michał Żygowski, Piotr Król

coreboot is an open source firmware development framework and its history is
reaching 1999. Its primary goal was to boot the machine as fast as possible and
launch a Linux kernel. OpenPOWER firmware has a similar goal: initialize the
hardware and launch a Linux kernel. coreboot has always been in favor of open
hardware and open firmware solutions. The best proof is that the first open
firmware implementation for RISC-V appeared right here, in coreboot. Now the
time comes for OpenPOWER.

This talk will describe the plans of porting the POWER9 architecture to
coreboot along with Talos II and Talos II Lite machines. With joint cooperation
of 3mdeb Embedded Systems Consulting, Insurgo Technologies Libres/Open
Technologies and Raptor Computing Systems this plan may become a reality in the
near future. In this presentation the details of coreboot port for POWER9 will
be discussed covering hostboot, skiboot and petitboot and how they fit into
coreboot firmware model.

Although the coreboot project aims to support fully open source boot firmware,
it is not always possible to avoid binary blobs that initialize hardware. A
good example of such a situation is modern x86 architecture. That is why we
need to push open hardware and firmware such as RISC-V and OpenPOWER. By
enabling POWER9 hardware in coreboot, the OpenPOWER will become much more
popular. The community will have a chance to benefit from using coreboot on the
open platforms such as Talos II and Talos II Lite, platforms which respect your
freedom (RYF).

Main Stage